Non-volatile storage devices have enabled increased portability of data and software applications. Non-volatile storage devices can enhance data storage density by storing multiple bits in each memory cell. For example, some non-volatile storage devices provide increased storage density by storing information that indicates two bits per cell, three bits per cell, four bits per cell, or more. Further, as semiconductor processes scale down, integrated circuits may store more information for a particular circuit area.
Error correction coding (ECC) is often used to correct errors that occur in data read from a memory device. Prior to storage, data may be encoded by an ECC engine to generate redundant information that may be stored with the data as an ECC codeword. An ECC engine has an error correction capability. Bit error rates (BERs) that exceed the error correction capability of the ECC engine cause “uncorrectable” error correction coding (UECC) errors.
Some data storage devices interleave data to reduce or avoid UECC errors. Interleaving the data may introduce latency in certain operations. For example, deinterleaving of the data during a read operation may cause read latency and may consume resources of a storage device. For example, to read a page, multiple pages may be read and portions of the pages may be shifted to deinterleave the pages, which may use multiple clock cycles and may cause read disturb effects to a memory (e.g., by reading multiple pages in response to a request to read one page).